From 442dd8ea7921f804c83cce413bcd70b029df21a2 Mon Sep 17 00:00:00 2001 From: brentru Date: Wed, 26 Jul 2017 09:58:44 -0400 Subject: [PATCH 1/4] added shiftinout --- simpleio.py | 66 ++++++++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 65 insertions(+), 1 deletion(-) diff --git a/simpleio.py b/simpleio.py index a8068f9..a278360 100644 --- a/simpleio.py +++ b/simpleio.py @@ -31,9 +31,73 @@ """ import digitalio -import math +import time + from neopixel_write import neopixel_write +def shiftIn(dataPin, clock, msb_first=True): + """ + Shifts in a byte of data one bit at a time. Starts from either the LSB or + MSB. + + :param dataPin: pin on which to input each bit + :param clock: toggles to signal dataPin reads + :param msb_first: order to shift bits (least significant or most significant bit first) + :return: returns the value read + :rtype: int + """ + + value = 0 + i = 0 + + for i in range(0, 8): + clock.value = True + if msb_first == False: + value |= ((dataPin.value) << i) + else: + value |= ((dataPin.value) << (7-i)) + clock.value = False + i+=1 + return value + +def shiftOut(dataPin, clock, value, msb_first=True): + """ + Shifts out a byte of data one bit at a time. Data gets written to a data + pin. Then, the clock pulses hi then low + + :param dataPin: value bits get output on this pin + :param clock: toggled once the data pin is set + :param msb_first: order to shift bits (least significant or most significant bit first) + :param value: byte to be shifted + + Example for Metro Express: + + .. code-block:: python + + import digitalio + import simpleio + from board import * + clock = digitalio.DigitalInOut(D12) + dataPin = digitalio.DigitalInOut(D11) + clock.direction = digitalio.Direction.OUTPUT + dataPin.direction = digitalio.Direction.OUTPUT + + while True: + valueSend = 500 + shiftOut(dataPin, clock, 'LSBFIRST', (valueSend>>8)) + shiftOut(dataPin, clock, 'LSBFIRST', valueSend) + shiftOut(dataPin, clock, 'MSBFIRST', (valueSend>>8)) + shiftOut(dataPin, clock, 'MSBFIRST', valueSend) + """ + value = value&0xFF + for i in range(0, 8): + if msb_first == False: + tmpval = bool((value & (1 << i))) + dataPin.value = tmpval + else: + tmpval = bool(value & (1 << (7-i))) + dataPin.value = tmpval + class DigitalOut: """ Simple digital output that is valid until soft reset. From 503596c4e7370da6ee6017a5a6703aae0a62e8b3 Mon Sep 17 00:00:00 2001 From: brentru Date: Fri, 28 Jul 2017 16:09:11 -0400 Subject: [PATCH 2/4] revised for tannewt --- simpleio.py | 37 ++++++++++++++++++++----------------- 1 file changed, 20 insertions(+), 17 deletions(-) diff --git a/simpleio.py b/simpleio.py index a278360..ff1008e 100644 --- a/simpleio.py +++ b/simpleio.py @@ -31,6 +31,7 @@ """ import digitalio +import math import time from neopixel_write import neopixel_write @@ -40,9 +41,9 @@ def shiftIn(dataPin, clock, msb_first=True): Shifts in a byte of data one bit at a time. Starts from either the LSB or MSB. - :param dataPin: pin on which to input each bit - :param clock: toggles to signal dataPin reads - :param msb_first: order to shift bits (least significant or most significant bit first) + :param ~digitalio.DigitalInOut dataPin: pin on which to input each bit + :param ~digitalio.DigitalInOut clock: toggles to signal dataPin reads + :param bool msb_first: True when the first bit is most significant :return: returns the value read :rtype: int """ @@ -52,10 +53,10 @@ def shiftIn(dataPin, clock, msb_first=True): for i in range(0, 8): clock.value = True - if msb_first == False: - value |= ((dataPin.value) << i) - else: + if msb_first: value |= ((dataPin.value) << (7-i)) + else: + value |= ((dataPin.value) << i) clock.value = False i+=1 return value @@ -65,12 +66,12 @@ def shiftOut(dataPin, clock, value, msb_first=True): Shifts out a byte of data one bit at a time. Data gets written to a data pin. Then, the clock pulses hi then low - :param dataPin: value bits get output on this pin - :param clock: toggled once the data pin is set - :param msb_first: order to shift bits (least significant or most significant bit first) + :param ~digitalio.DigitalInOut dataPin: value bits get output on this pin + :param ~digitalio.DigitalInOut clock: toggled once the data pin is set + :param bool msb_first: True when the first bit is most significant :param value: byte to be shifted - Example for Metro Express: + Example for Metro M0 Express: .. code-block:: python @@ -84,18 +85,20 @@ def shiftOut(dataPin, clock, value, msb_first=True): while True: valueSend = 500 - shiftOut(dataPin, clock, 'LSBFIRST', (valueSend>>8)) - shiftOut(dataPin, clock, 'LSBFIRST', valueSend) - shiftOut(dataPin, clock, 'MSBFIRST', (valueSend>>8)) - shiftOut(dataPin, clock, 'MSBFIRST', valueSend) + # shifting out least significant bits + shiftOut(dataPin, clock, (valueSend>>8), msb_first = False) + shiftOut(dataPin, clock, valueSend, msb_first = False) + # shifting out most significant bits + shiftOut(dataPin, clock, (valueSend>>8)) + shiftOut(dataPin, clock, valueSend) """ value = value&0xFF for i in range(0, 8): - if msb_first == False: - tmpval = bool((value & (1 << i))) + if msb_first: + tmpval = bool(value & (1 << (7-i))) dataPin.value = tmpval else: - tmpval = bool(value & (1 << (7-i))) + tmpval = bool((value & (1 << i))) dataPin.value = tmpval class DigitalOut: From 7b4625ffd1405837cf4bbd21ad29832f9cc6c70d Mon Sep 17 00:00:00 2001 From: Scott Shawcroft Date: Fri, 28 Jul 2017 14:26:19 -0700 Subject: [PATCH 3/4] Add value type --- simpleio.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/simpleio.py b/simpleio.py index ff1008e..a78164e 100644 --- a/simpleio.py +++ b/simpleio.py @@ -69,7 +69,7 @@ def shiftOut(dataPin, clock, value, msb_first=True): :param ~digitalio.DigitalInOut dataPin: value bits get output on this pin :param ~digitalio.DigitalInOut clock: toggled once the data pin is set :param bool msb_first: True when the first bit is most significant - :param value: byte to be shifted + :param int value: byte to be shifted Example for Metro M0 Express: From f36e772f0d611a0b52bf339ab96a27759d782316 Mon Sep 17 00:00:00 2001 From: Scott Shawcroft Date: Mon, 31 Jul 2017 18:05:29 -0700 Subject: [PATCH 4/4] Use python style function capitalization. --- simpleio.py | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/simpleio.py b/simpleio.py index 63181e2..da0ab95 100644 --- a/simpleio.py +++ b/simpleio.py @@ -30,7 +30,7 @@ import math import time -def shiftIn(dataPin, clock, msb_first=True): +def shift_in(dataPin, clock, msb_first=True): """ Shifts in a byte of data one bit at a time. Starts from either the LSB or MSB. @@ -55,7 +55,7 @@ def shiftIn(dataPin, clock, msb_first=True): i+=1 return value -def shiftOut(dataPin, clock, value, msb_first=True): +def shift_out(dataPin, clock, value, msb_first=True): """ Shifts out a byte of data one bit at a time. Data gets written to a data pin. Then, the clock pulses hi then low @@ -80,11 +80,11 @@ def shiftOut(dataPin, clock, value, msb_first=True): while True: valueSend = 500 # shifting out least significant bits - shiftOut(dataPin, clock, (valueSend>>8), msb_first = False) - shiftOut(dataPin, clock, valueSend, msb_first = False) + shift_out(dataPin, clock, (valueSend>>8), msb_first = False) + shift_out(dataPin, clock, valueSend, msb_first = False) # shifting out most significant bits - shiftOut(dataPin, clock, (valueSend>>8)) - shiftOut(dataPin, clock, valueSend) + shift_out(dataPin, clock, (valueSend>>8)) + shift_out(dataPin, clock, valueSend) """ value = value&0xFF for i in range(0, 8):