only for vectors

Author: folkertdev

llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp

@@ -1795,14 +1795,34 @@ bool AArch64LegalizerInfo::legalizeIntrinsic(LegalizerHelper &Helper,
     MI.eraseFromParent();
     return true;
   }
-  case Intrinsic::aarch64_neon_sqadd:
-    return LowerBinOp(TargetOpcode::G_SADDSAT);
-  case Intrinsic::aarch64_neon_sqsub:
-    return LowerBinOp(TargetOpcode::G_SSUBSAT);
-  case Intrinsic::aarch64_neon_uqadd:
-    return LowerBinOp(TargetOpcode::G_UADDSAT);
-  case Intrinsic::aarch64_neon_uqsub:
-    return LowerBinOp(TargetOpcode::G_USUBSAT);
+  case Intrinsic::aarch64_neon_sqadd: {
+    MachineIRBuilder MIB(MI);
+    if (MIB.getMRI()->getType(MI.getOperand(0).getReg()).isVector())
+        return LowerBinOp(TargetOpcode::G_SADDSAT);
+
+    break;
+  }
+  case Intrinsic::aarch64_neon_sqsub: {
+    MachineIRBuilder MIB(MI);
+    if (MIB.getMRI()->getType(MI.getOperand(0).getReg()).isVector())
+        return LowerBinOp(TargetOpcode::G_SSUBSAT);
+
+    break;
+  }
+  case Intrinsic::aarch64_neon_uqadd: {
+    MachineIRBuilder MIB(MI);
+    if (MIB.getMRI()->getType(MI.getOperand(0).getReg()).isVector())
+        return LowerBinOp(TargetOpcode::G_UADDSAT);
+
+    break;
+  }
+  case Intrinsic::aarch64_neon_uqsub: {
+    MachineIRBuilder MIB(MI);
+    if (MIB.getMRI()->getType(MI.getOperand(0).getReg()).isVector())
+        return LowerBinOp(TargetOpcode::G_USUBSAT);
+
+    break;
+  }
 
   case Intrinsic::vector_reverse:
     // TODO: Add support for vector_reverse