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Update riscv-target-features.c and attribute-arch.s
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‎clang/test/Preprocessor/riscv-target-features.c

Lines changed: 63 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -50,6 +50,8 @@
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// CHECK-NOT: __riscv_xtheadsync {{.*$}}
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// CHECK-NOT: __riscv_xtheadvdot {{.*$}}
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// CHECK-NOT: __riscv_xventanacondops {{.*$}}
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// CHECK-NOT: __riscv_za128rs {{.*$}}
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// CHECK-NOT: __riscv_za64rs {{.*$}}
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// CHECK-NOT: __riscv_zawrs {{.*$}}
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// CHECK-NOT: __riscv_zba {{.*$}}
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// CHECK-NOT: __riscv_zbb {{.*$}}
@@ -71,9 +73,14 @@
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// CHECK-NOT: __riscv_zfinx {{.*$}}
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// CHECK-NOT: __riscv_zhinx {{.*$}}
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// CHECK-NOT: __riscv_zhinxmin {{.*$}}
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// CHECK-NOT: __riscv_zic64b {{.*$}}
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// CHECK-NOT: __riscv_zicbom {{.*$}}
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// CHECK-NOT: __riscv_zicbop {{.*$}}
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// CHECK-NOT: __riscv_zicboz {{.*$}}
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// CHECK-NOT: __riscv_ziccamoa {{.*$}}
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// CHECK-NOT: __riscv_ziccif {{.*$}}
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// CHECK-NOT: __riscv_zicclsm {{.*$}}
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// CHECK-NOT: __riscv_ziccrse {{.*$}}
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// CHECK-NOT: __riscv_zicntr {{.*$}}
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// CHECK-NOT: __riscv_zicsr {{.*$}}
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// CHECK-NOT: __riscv_zifencei {{.*$}}
@@ -451,6 +458,22 @@
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// RUN: -o - | FileCheck --check-prefix=CHECK-XVENTANACONDOPS-EXT %s
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// CHECK-XVENTANACONDOPS-EXT: __riscv_xventanacondops 1000000{{$}}
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// RUN: %clang --target=riscv32-unknown-linux-gnu \
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// RUN: -march=rv32iza128rs -x c -E -dM %s \
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// RUN: -o - | FileCheck --check-prefix=CHECK-ZA128RS-EXT %s
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// RUN: %clang --target=riscv64-unknown-linux-gnu \
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// RUN: -march=rv64iza128rs -x c -E -dM %s \
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// RUN: -o - | FileCheck --check-prefix=CHECK-ZA128RS-EXT %s
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// CHECK-ZA128RS-EXT: __riscv_za128rs 1000000{{$}}
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// RUN: %clang --target=riscv32-unknown-linux-gnu \
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// RUN: -march=rv32iza64rs -x c -E -dM %s \
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// RUN: -o - | FileCheck --check-prefix=CHECK-ZA64RS-EXT %s
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// RUN: %clang --target=riscv64-unknown-linux-gnu \
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// RUN: -march=rv64iza64rs -x c -E -dM %s \
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// RUN: -o - | FileCheck --check-prefix=CHECK-ZA64RS-EXT %s
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// CHECK-ZA64RS-EXT: __riscv_za64rs 1000000{{$}}
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// RUN: %clang --target=riscv32-unknown-linux-gnu \
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// RUN: -march=rv32izawrs -x c -E -dM %s \
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// RUN: -o - | FileCheck --check-prefix=CHECK-ZAWRS-EXT %s
@@ -645,6 +668,14 @@
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// RUN: -o - | FileCheck --check-prefix=CHECK-ZHINXMIN-EXT %s
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// CHECK-ZHINXMIN-EXT: __riscv_zhinxmin 1000000{{$}}
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// RUN: %clang --target=riscv32-unknown-linux-gnu \
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// RUN: -march=rv32izic64b -x c -E -dM %s \
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// RUN: -o - | FileCheck --check-prefix=CHECK-ZIC64B-EXT %s
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// RUN: %clang --target=riscv64-unknown-linux-gnu \
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// RUN: -march=rv64izic64b -x c -E -dM %s \
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// RUN: -o - | FileCheck --check-prefix=CHECK-ZIC64B-EXT %s
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// CHECK-ZIC64B-EXT: __riscv_zic64b 1000000{{$}}
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// RUN: %clang --target=riscv32-unknown-linux-gnu \
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// RUN: -march=rv32izicbom -x c -E -dM %s \
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// RUN: -o - | FileCheck --check-prefix=CHECK-ZICBOM-EXT %s
@@ -669,6 +700,38 @@
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// RUN: -o - | FileCheck --check-prefix=CHECK-ZICBOZ-EXT %s
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// CHECK-ZICBOZ-EXT: __riscv_zicboz 1000000{{$}}
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// RUN: %clang --target=riscv32-unknown-linux-gnu \
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// RUN: -march=rv32iziccamoa -x c -E -dM %s \
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// RUN: -o - | FileCheck --check-prefix=CHECK-ZICCAMOA-EXT %s
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// RUN: %clang --target=riscv64-unknown-linux-gnu \
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// RUN: -march=rv64iziccamoa -x c -E -dM %s \
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// RUN: -o - | FileCheck --check-prefix=CHECK-ZICCAMOA-EXT %s
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// CHECK-ZICCAMOA-EXT: __riscv_ziccamoa 1000000{{$}}
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// RUN: %clang --target=riscv32-unknown-linux-gnu \
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// RUN: -march=rv32iziccif -x c -E -dM %s \
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// RUN: -o - | FileCheck --check-prefix=CHECK-ZICCIF-EXT %s
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// RUN: %clang --target=riscv64-unknown-linux-gnu \
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// RUN: -march=rv64iziccif -x c -E -dM %s \
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// RUN: -o - | FileCheck --check-prefix=CHECK-ZICCIF-EXT %s
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// CHECK-ZICCIF-EXT: __riscv_ziccif 1000000{{$}}
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// RUN: %clang --target=riscv32-unknown-linux-gnu \
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// RUN: -march=rv32izicclsm -x c -E -dM %s \
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// RUN: -o - | FileCheck --check-prefix=CHECK-ZICCLSM-EXT %s
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// RUN: %clang --target=riscv64-unknown-linux-gnu \
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// RUN: -march=rv64izicclsm -x c -E -dM %s \
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// RUN: -o - | FileCheck --check-prefix=CHECK-ZICCLSM-EXT %s
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// CHECK-ZICCLSM-EXT: __riscv_zicclsm 1000000{{$}}
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// RUN: %clang --target=riscv32-unknown-linux-gnu \
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// RUN: -march=rv32iziccrse -x c -E -dM %s \
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// RUN: -o - | FileCheck --check-prefix=CHECK-ZICCRSE-EXT %s
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// RUN: %clang --target=riscv64-unknown-linux-gnu \
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// RUN: -march=rv64iziccrse -x c -E -dM %s \
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// RUN: -o - | FileCheck --check-prefix=CHECK-ZICCRSE-EXT %s
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// CHECK-ZICCRSE-EXT: __riscv_ziccrse 1000000{{$}}
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// RUN: %clang --target=riscv32-unknown-linux-gnu \
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// RUN: -march=rv32izicntr -x c -E -dM %s \
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// RUN: -o - | FileCheck --check-prefix=CHECK-ZICNTR-EXT %s

‎llvm/test/MC/RISCV/attribute-arch.s

Lines changed: 22 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -91,6 +91,9 @@
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.attribute arch, "rv32ifdzve64d"
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# CHECK: attribute 5, "rv32i2p1_f2p2_d2p2_zicsr2p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl32b1p0_zvl64b1p0"
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.attribute arch, "rv32izic64b"
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# CHECK: attribute 5, "rv32i2p1_zic64b1p0"
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.attribute arch, "rv32izicbom"
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# CHECK: attribute 5, "rv32i2p1_zicbom1p0"
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@@ -100,6 +103,18 @@
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.attribute arch, "rv32izicbop"
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# CHECK: attribute 5, "rv32i2p1_zicbop1p0"
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.attribute arch, "rv32iziccamoa"
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# CHECK: attribute 5, "rv32i2p1_ziccamoa1p0"
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.attribute arch, "rv32iziccif"
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# CHECK: attribute 5, "rv32i2p1_ziccif1p0"
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.attribute arch, "rv32izicclsm"
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# CHECK: attribute 5, "rv32i2p1_zicclsm1p0"
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.attribute arch, "rv32iziccrse"
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# CHECK: attribute 5, "rv32i2p1_ziccrse1p0"
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## Experimental extensions require version string to be explicitly specified
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.attribute arch, "rv32izba1p0"
@@ -125,7 +140,7 @@
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126141
.attribute arch, "rv32i_zve64x_zvkn1p0"
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# CHECK: attribute 5, "rv32i2p1_zicsr2p0_zve32x1p0_zve64x1p0_zvkb1p0_zvkn1p0_zvkned1p0_zvknhb1p0_zvkt1p0_zvl32b1p0_zvl64b1p0"
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.attribute arch, "rv32i_zve64x_zvknc1p0"
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# CHECK: attribute 5, "rv32i2p1_zicsr2p0_zvbc1p0_zve32x1p0_zve64x1p0_zvkb1p0_zvkn1p0_zvknc1p0_zvkned1p0_zvknhb1p0_zvkt1p0_zvl32b1p0_zvl64b1p0"
131146

@@ -249,6 +264,12 @@
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.attribute arch, "rv64i_xsfvcp"
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# CHECK: attribute 5, "rv64i2p1_zicsr2p0_zve32x1p0_zvl32b1p0_xsfvcp1p0"
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.attribute arch, "rv32iza128rs1p0"
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# CHECK: attribute 5, "rv32i2p1_za128rs1p0"
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.attribute arch, "rv32iza64rs1p0"
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# CHECK: attribute 5, "rv32i2p1_za64rs1p0"
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.attribute arch, "rv32izawrs1p0"
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# CHECK: attribute 5, "rv32i2p1_zawrs1p0"
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