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[CostModel][X86] Recognise vector rotation by uniform constant patterns
Adds suitable costs for AVX512 targets (we still rely on default expansion for AVX2 and earlier)
1 parent ed741ff commit c02ed29

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11 files changed

+204
-153
lines changed

11 files changed

+204
-153
lines changed

‎llvm/lib/Target/X86/X86TargetTransformInfo.cpp

Lines changed: 34 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -3402,6 +3402,9 @@ X86TTIImpl::getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
34023402
{ ISD::ROTR, MVT::v32i16, { 1, 1, 1, 1 } },
34033403
{ ISD::ROTR, MVT::v16i16, { 1, 1, 1, 1 } },
34043404
{ ISD::ROTR, MVT::v8i16, { 1, 1, 1, 1 } },
3405+
{ X86ISD::VROTLI, MVT::v32i16, { 1, 1, 1, 1 } },
3406+
{ X86ISD::VROTLI, MVT::v16i16, { 1, 1, 1, 1 } },
3407+
{ X86ISD::VROTLI, MVT::v8i16, { 1, 1, 1, 1 } },
34053408
};
34063409
static const CostKindTblEntry AVX512BITALGCostTbl[] = {
34073410
{ ISD::CTPOP, MVT::v32i16, { 1, 1, 1, 1 } },
@@ -3498,6 +3501,12 @@ X86TTIImpl::getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
34983501
{ ISD::ROTR, MVT::v64i8, { 5, 6, 12, 14 } },
34993502
{ ISD::ROTR, MVT::v32i8, { 5, 14, 6, 9 } },
35003503
{ ISD::ROTR, MVT::v16i8, { 5, 14, 6, 9 } },
3504+
{ X86ISD::VROTLI, MVT::v32i16, { 2, 5, 3, 3 } },
3505+
{ X86ISD::VROTLI, MVT::v16i16, { 1, 5, 3, 3 } },
3506+
{ X86ISD::VROTLI, MVT::v8i16, { 1, 5, 3, 3 } },
3507+
{ X86ISD::VROTLI, MVT::v64i8, { 2, 9, 3, 4 } },
3508+
{ X86ISD::VROTLI, MVT::v32i8, { 1, 9, 3, 4 } },
3509+
{ X86ISD::VROTLI, MVT::v16i8, { 1, 8, 3, 4 } },
35013510
{ ISD::SADDSAT, MVT::v32i16, { 1 } },
35023511
{ ISD::SADDSAT, MVT::v64i8, { 1 } },
35033512
{ ISD::SMAX, MVT::v32i16, { 1, 1, 1, 1 } },
@@ -3556,6 +3565,12 @@ X86TTIImpl::getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
35563565
{ ISD::ROTR, MVT::v16i32, { 1, 1, 1, 1 } },
35573566
{ ISD::ROTR, MVT::v8i32, { 1, 1, 1, 1 } },
35583567
{ ISD::ROTR, MVT::v4i32, { 1, 1, 1, 1 } },
3568+
{ X86ISD::VROTLI, MVT::v8i64, { 1, 1, 1, 1 } },
3569+
{ X86ISD::VROTLI, MVT::v4i64, { 1, 1, 1, 1 } },
3570+
{ X86ISD::VROTLI, MVT::v2i64, { 1, 1, 1, 1 } },
3571+
{ X86ISD::VROTLI, MVT::v16i32, { 1, 1, 1, 1 } },
3572+
{ X86ISD::VROTLI, MVT::v8i32, { 1, 1, 1, 1 } },
3573+
{ X86ISD::VROTLI, MVT::v4i32, { 1, 1, 1, 1 } },
35593574
{ ISD::SMAX, MVT::v8i64, { 1, 3, 1, 1 } },
35603575
{ ISD::SMAX, MVT::v16i32, { 1, 1, 1, 1 } },
35613576
{ ISD::SMAX, MVT::v32i16, { 3, 7, 5, 5 } },
@@ -3642,7 +3657,15 @@ X86TTIImpl::getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
36423657
{ ISD::ROTR, MVT::v2i64, { 1, 3, 3, 3 } },
36433658
{ ISD::ROTR, MVT::v4i32, { 1, 3, 3, 3 } },
36443659
{ ISD::ROTR, MVT::v8i16, { 1, 3, 3, 3 } },
3645-
{ ISD::ROTR, MVT::v16i8, { 1, 3, 3, 3 } }
3660+
{ ISD::ROTR, MVT::v16i8, { 1, 3, 3, 3 } },
3661+
{ X86ISD::VROTLI, MVT::v4i64, { 4, 7, 5, 6 } },
3662+
{ X86ISD::VROTLI, MVT::v8i32, { 4, 7, 5, 6 } },
3663+
{ X86ISD::VROTLI, MVT::v16i16, { 4, 7, 5, 6 } },
3664+
{ X86ISD::VROTLI, MVT::v32i8, { 4, 7, 5, 6 } },
3665+
{ X86ISD::VROTLI, MVT::v2i64, { 1, 3, 1, 1 } },
3666+
{ X86ISD::VROTLI, MVT::v4i32, { 1, 3, 1, 1 } },
3667+
{ X86ISD::VROTLI, MVT::v8i16, { 1, 3, 1, 1 } },
3668+
{ X86ISD::VROTLI, MVT::v16i8, { 1, 3, 1, 1 } },
36463669
};
36473670
static const CostKindTblEntry AVX2CostTbl[] = {
36483671
{ ISD::ABS, MVT::v2i64, { 2, 4, 3, 5 } }, // VBLENDVPD(X,VPSUBQ(0,X),X)
@@ -4096,9 +4119,11 @@ X86TTIImpl::getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
40964119
const SmallVectorImpl<const Value *> &Args = ICA.getArgs();
40974120
if (Args[0] == Args[1]) {
40984121
ISD = ISD::ROTL;
4099-
// Handle scalar constant rotation amounts.
4100-
// TODO: Handle vector + funnel-shift cases.
4101-
if (isa_and_nonnull<ConstantInt>(Args[2]))
4122+
// Handle uniform constant rotation amounts.
4123+
// TODO: Handle funnel-shift cases.
4124+
const APInt *Amt;
4125+
if (Args[2] &&
4126+
PatternMatch::match(Args[2], PatternMatch::m_APIntAllowUndef(Amt)))
41024127
ISD = X86ISD::VROTLI;
41034128
}
41044129
}
@@ -4109,10 +4134,12 @@ X86TTIImpl::getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
41094134
if (!ICA.isTypeBasedOnly()) {
41104135
const SmallVectorImpl<const Value *> &Args = ICA.getArgs();
41114136
if (Args[0] == Args[1]) {
4112-
// Handle scalar constant rotation amount.
4113-
// TODO: Handle vector + funnel-shift cases.
41144137
ISD = ISD::ROTR;
4115-
if (isa_and_nonnull<ConstantInt>(Args[2]))
4138+
// Handle uniform constant rotation amount.
4139+
// TODO: Handle funnel-shift cases.
4140+
const APInt *Amt;
4141+
if (Args[2] &&
4142+
PatternMatch::match(Args[2], PatternMatch::m_APIntAllowUndef(Amt)))
41164143
ISD = X86ISD::VROTLI;
41174144
}
41184145
}

‎llvm/test/Analysis/CostModel/X86/fshl-codesize.ll

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -2744,9 +2744,9 @@ define void @splatconstant_rotate_i16(i16 %a16, <8 x i16> %a128, <16 x i16> %a25
27442744
;
27452745
; AVX512BW-LABEL: 'splatconstant_rotate_i16'
27462746
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = call i16 @llvm.fshl.i16(i16 %a16, i16 %a16, i16 3)
2747-
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V8I16 = call <8 x i16> @llvm.fshl.v8i16(<8 x i16> %a128, <8 x i16> %a128, <8 x i16> <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3>)
2748-
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V16I16 = call <16 x i16> @llvm.fshl.v16i16(<16 x i16> %a256, <16 x i16> %a256, <16 x i16> <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3>)
2749-
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V32I16 = call <32 x i16> @llvm.fshl.v32i16(<32 x i16> %a512, <32 x i16> %a512, <32 x i16> <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3>)
2747+
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V8I16 = call <8 x i16> @llvm.fshl.v8i16(<8 x i16> %a128, <8 x i16> %a128, <8 x i16> <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3>)
2748+
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V16I16 = call <16 x i16> @llvm.fshl.v16i16(<16 x i16> %a256, <16 x i16> %a256, <16 x i16> <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3>)
2749+
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V32I16 = call <32 x i16> @llvm.fshl.v32i16(<32 x i16> %a512, <32 x i16> %a512, <32 x i16> <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3>)
27502750
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
27512751
;
27522752
; AVX512DQ-LABEL: 'splatconstant_rotate_i16'
@@ -2829,9 +2829,9 @@ define void @splatconstant_rotate_i8(i8 %a8, <16 x i8> %a128, <32 x i8> %a256, <
28292829
;
28302830
; AVX512BW-LABEL: 'splatconstant_rotate_i8'
28312831
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = call i8 @llvm.fshl.i8(i8 %a8, i8 %a8, i8 3)
2832-
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V16I8 = call <16 x i8> @llvm.fshl.v16i8(<16 x i8> %a128, <16 x i8> %a128, <16 x i8> <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3>)
2833-
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V32I8 = call <32 x i8> @llvm.fshl.v32i8(<32 x i8> %a256, <32 x i8> %a256, <32 x i8> <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3>)
2834-
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %V64I8 = call <64 x i8> @llvm.fshl.v64i8(<64 x i8> %a512, <64 x i8> %a512, <64 x i8> <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3>)
2832+
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V16I8 = call <16 x i8> @llvm.fshl.v16i8(<16 x i8> %a128, <16 x i8> %a128, <16 x i8> <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3>)
2833+
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V32I8 = call <32 x i8> @llvm.fshl.v32i8(<32 x i8> %a256, <32 x i8> %a256, <32 x i8> <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3>)
2834+
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V64I8 = call <64 x i8> @llvm.fshl.v64i8(<64 x i8> %a512, <64 x i8> %a512, <64 x i8> <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3>)
28352835
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
28362836
;
28372837
; AVX512DQ-LABEL: 'splatconstant_rotate_i8'
@@ -2843,9 +2843,9 @@ define void @splatconstant_rotate_i8(i8 %a8, <16 x i8> %a128, <32 x i8> %a256, <
28432843
;
28442844
; AVX512VBMI2-LABEL: 'splatconstant_rotate_i8'
28452845
; AVX512VBMI2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = call i8 @llvm.fshl.i8(i8 %a8, i8 %a8, i8 3)
2846-
; AVX512VBMI2-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V16I8 = call <16 x i8> @llvm.fshl.v16i8(<16 x i8> %a128, <16 x i8> %a128, <16 x i8> <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3>)
2847-
; AVX512VBMI2-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V32I8 = call <32 x i8> @llvm.fshl.v32i8(<32 x i8> %a256, <32 x i8> %a256, <32 x i8> <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3>)
2848-
; AVX512VBMI2-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %V64I8 = call <64 x i8> @llvm.fshl.v64i8(<64 x i8> %a512, <64 x i8> %a512, <64 x i8> <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3>)
2846+
; AVX512VBMI2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V16I8 = call <16 x i8> @llvm.fshl.v16i8(<16 x i8> %a128, <16 x i8> %a128, <16 x i8> <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3>)
2847+
; AVX512VBMI2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V32I8 = call <32 x i8> @llvm.fshl.v32i8(<32 x i8> %a256, <32 x i8> %a256, <32 x i8> <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3>)
2848+
; AVX512VBMI2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V64I8 = call <64 x i8> @llvm.fshl.v64i8(<64 x i8> %a512, <64 x i8> %a512, <64 x i8> <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3>)
28492849
; AVX512VBMI2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
28502850
;
28512851
; SLM-LABEL: 'splatconstant_rotate_i8'
@@ -2871,9 +2871,9 @@ define void @splatconstant_rotate_i8(i8 %a8, <16 x i8> %a128, <32 x i8> %a256, <
28712871
;
28722872
; AVX512GFNI-LABEL: 'splatconstant_rotate_i8'
28732873
; AVX512GFNI-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = call i8 @llvm.fshl.i8(i8 %a8, i8 %a8, i8 3)
2874-
; AVX512GFNI-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V16I8 = call <16 x i8> @llvm.fshl.v16i8(<16 x i8> %a128, <16 x i8> %a128, <16 x i8> <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3>)
2875-
; AVX512GFNI-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V32I8 = call <32 x i8> @llvm.fshl.v32i8(<32 x i8> %a256, <32 x i8> %a256, <32 x i8> <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3>)
2876-
; AVX512GFNI-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %V64I8 = call <64 x i8> @llvm.fshl.v64i8(<64 x i8> %a512, <64 x i8> %a512, <64 x i8> <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3>)
2874+
; AVX512GFNI-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V16I8 = call <16 x i8> @llvm.fshl.v16i8(<16 x i8> %a128, <16 x i8> %a128, <16 x i8> <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3>)
2875+
; AVX512GFNI-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V32I8 = call <32 x i8> @llvm.fshl.v32i8(<32 x i8> %a256, <32 x i8> %a256, <32 x i8> <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3>)
2876+
; AVX512GFNI-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V64I8 = call <64 x i8> @llvm.fshl.v64i8(<64 x i8> %a512, <64 x i8> %a512, <64 x i8> <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3>)
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; AVX512GFNI-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
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;
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%I8 = call i8 @llvm.fshl.i8(i8 %a8, i8 %a8, i8 3)

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