diff --git a/llvm/test/CodeGen/X86/isel-bitcast.ll b/llvm/test/CodeGen/X86/isel-bitcast.ll
new file mode 100644
index 0000000000000..2fcb122020708
--- /dev/null
+++ b/llvm/test/CodeGen/X86/isel-bitcast.ll
@@ -0,0 +1,62 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s -check-prefixes=X86
+; RUN: llc < %s -mtriple=x86_64--| FileCheck %s -check-prefixes=X64
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s -check-prefixes=X86
+; RUN: llc < %s -mtriple=x86_64--| FileCheck %s -check-prefixes=X64
+
+define i64 @test1(double %t) {
+; X86-LABEL: test1:
+; X86:       # %bb.0:
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT:    retl
+;
+; X64-LABEL: test1:
+; X64:       # %bb.0:
+; X64-NEXT:    movq %xmm0, %rax
+; X64-NEXT:    retq
+        %u = bitcast double %t to i64           ; <i64> [#uses=1]
+        ret i64 %u
+}
+
+define double @test2(i64 %t) {
+; X86-LABEL: test2:
+; X86:       # %bb.0:
+; X86-NEXT:    fldl {{[0-9]+}}(%esp)
+; X86-NEXT:    retl
+;
+; X64-LABEL: test2:
+; X64:       # %bb.0:
+; X64-NEXT:    movq %rdi, %xmm0
+; X64-NEXT:    retq
+        %u = bitcast i64 %t to double           ; <double> [#uses=1]
+        ret double %u
+}
+
+define i32 @test3(float %t) {
+; X86-LABEL: test3:
+; X86:       # %bb.0:
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    retl
+;
+; X64-LABEL: test3:
+; X64:       # %bb.0:
+; X64-NEXT:    movd %xmm0, %eax
+; X64-NEXT:    retq
+        %u = bitcast float %t to i32            ; <i32> [#uses=1]
+        ret i32 %u
+}
+
+define float @test4(i32 %t) {
+; X86-LABEL: test4:
+; X86:       # %bb.0:
+; X86-NEXT:    flds {{[0-9]+}}(%esp)
+; X86-NEXT:    retl
+;
+; X64-LABEL: test4:
+; X64:       # %bb.0:
+; X64-NEXT:    movd %edi, %xmm0
+; X64-NEXT:    retq
+        %u = bitcast i32 %t to float            ; <float> [#uses=1]
+        ret float %u
+}