From b2868be3b87f2b71cb7109354bd8429fa74c2a95 Mon Sep 17 00:00:00 2001 From: Petr Hosek Date: Sat, 23 Dec 2023 04:48:39 +0000 Subject: [PATCH] [builtins] Fix CPU feature detection for Zircon This is a follow up to #75635 which broke the build on Fuchsia. We don't support ifunc on Fuchsia so we shouldn't define __init_cpu_features. For __init_cpu_features_resolver we have to use _zx_system_get_features as a Zircon native solution. --- compiler-rt/lib/builtins/cpu_model/aarch64.c | 1 - .../cpu_model/aarch64/fmv/fuchsia.inc | 59 ++++++++++++++----- 2 files changed, 44 insertions(+), 16 deletions(-) diff --git a/compiler-rt/lib/builtins/cpu_model/aarch64.c b/compiler-rt/lib/builtins/cpu_model/aarch64.c index d59dbfdad3808..8e85de2218f7d 100644 --- a/compiler-rt/lib/builtins/cpu_model/aarch64.c +++ b/compiler-rt/lib/builtins/cpu_model/aarch64.c @@ -133,7 +133,6 @@ struct { #include "aarch64/fmv/mrs.inc" #include "aarch64/fmv/freebsd.inc" #elif defined(__Fuchsia__) -#include "aarch64/fmv/mrs.inc" #include "aarch64/fmv/fuchsia.inc" #elif defined(__ANDROID__) #include "aarch64/fmv/mrs.inc" diff --git a/compiler-rt/lib/builtins/cpu_model/aarch64/fmv/fuchsia.inc b/compiler-rt/lib/builtins/cpu_model/aarch64/fmv/fuchsia.inc index 4dab6ff58b378..d8e0280f40416 100644 --- a/compiler-rt/lib/builtins/cpu_model/aarch64/fmv/fuchsia.inc +++ b/compiler-rt/lib/builtins/cpu_model/aarch64/fmv/fuchsia.inc @@ -1,22 +1,51 @@ -void __init_cpu_features_resolver(unsigned long hwcap, - const __ifunc_arg_t *arg) { +#include +#include + +void __init_cpu_features_resolver() { if (__aarch64_cpu_features.features) return; - __init_cpu_features_constructor(hwcap, arg); -} - -void CONSTRUCTOR_ATTRIBUTE __init_cpu_features(void) { - // CPU features already initialized. - if (__aarch64_cpu_features.features) + // This ensures the vDSO is a direct link-time dependency of anything that + // needs this initializer code. +#pragma comment(lib, "zircon") + uint32_t features; + zx_status_t status = _zx_system_get_features(ZX_FEATURE_KIND_CPU, &features); + if (status != ZX_OK) return; - unsigned long hwcap = getauxval(AT_HWCAP); - unsigned long hwcap2 = getauxval(AT_HWCAP2); +#define setCPUFeature(cpu_feature) \ + __aarch64_cpu_features.features |= 1ULL << cpu_feature + + if (features & ZX_ARM64_FEATURE_ISA_FP) + setCPUFeature(FEAT_FP); + if (features & ZX_ARM64_FEATURE_ISA_ASIMD) + setCPUFeature(FEAT_SIMD); + if (features & ZX_ARM64_FEATURE_ISA_AES) + setCPUFeature(FEAT_AES); + if (features & ZX_ARM64_FEATURE_ISA_PMULL) + setCPUFeature(FEAT_PMULL); + if (features & ZX_ARM64_FEATURE_ISA_SHA1) + setCPUFeature(FEAT_SHA1); + if (features & ZX_ARM64_FEATURE_ISA_SHA256) + setCPUFeature(FEAT_SHA2); + if (features & ZX_ARM64_FEATURE_ISA_CRC32) + setCPUFeature(FEAT_CRC); + if (features & ZX_ARM64_FEATURE_ISA_RDM) + setCPUFeature(FEAT_RDM); + if (features & ZX_ARM64_FEATURE_ISA_SHA3) + setCPUFeature(FEAT_SHA3); + if (features & ZX_ARM64_FEATURE_ISA_SM4) + setCPUFeature(FEAT_SM4); + if (features & ZX_ARM64_FEATURE_ISA_DP) + setCPUFeature(FEAT_DOTPROD); + if (features & ZX_ARM64_FEATURE_ISA_FHM) + setCPUFeature(FEAT_FP16FML); + if (features & ZX_ARM64_FEATURE_ISA_SHA512) + setCPUFeature(FEAT_SHA3); + if (features & ZX_ARM64_FEATURE_ISA_I8MM) + setCPUFeature(FEAT_I8MM); + if (features & ZX_ARM64_FEATURE_ISA_SVE) + setCPUFeature(FEAT_SVE); - __ifunc_arg_t arg; - arg._size = sizeof(__ifunc_arg_t); - arg._hwcap = hwcap; - arg._hwcap2 = hwcap2; - __init_cpu_features_constructor(hwcap | _IFUNC_ARG_HWCAP, &arg); + setCPUFeature(FEAT_INIT); }