From 9cebc49ce0354a4e1c663df6a60f638f06c13ae0 Mon Sep 17 00:00:00 2001 From: zxc12523 Date: Thu, 25 Apr 2024 21:28:58 +0800 Subject: [PATCH] fix: typo "CLTZ"-> "CTLZ" --- llvm/lib/Target/X86/X86ISelLowering.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index dd40d079c7e2f..c8716caabdeae 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -27893,7 +27893,7 @@ static SDValue LowerVectorCTLZInRegLUT(SDValue Op, const SDLoc &DL, SDValue InRegLUT = DAG.getBuildVector(CurrVT, DL, LUTVec); // Begin by bitcasting the input to byte vector, then split those bytes - // into lo/hi nibbles and use the PSHUFB LUT to perform CLTZ on each of them. + // into lo/hi nibbles and use the PSHUFB LUT to perform CTLZ on each of them. // If the hi input nibble is zero then we add both results together, otherwise // we just take the hi result (by masking the lo result to zero before the // add).