diff --git a/llvm/lib/Transforms/Vectorize/VectorCombine.cpp b/llvm/lib/Transforms/Vectorize/VectorCombine.cpp index bbb70134870ab..8573a8adf53b3 100644 --- a/llvm/lib/Transforms/Vectorize/VectorCombine.cpp +++ b/llvm/lib/Transforms/Vectorize/VectorCombine.cpp @@ -1961,17 +1961,17 @@ bool VectorCombine::foldTruncFromReductions(Instruction &I) { if (!match(ReductionSrc, m_OneUse(m_Trunc(m_Value(TruncSrc))))) return false; - auto *Trunc = cast(ReductionSrc); auto *TruncSrcTy = cast(TruncSrc->getType()); auto *ReductionSrcTy = cast(ReductionSrc->getType()); Type *ResultTy = I.getType(); TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput; - InstructionCost OldCost = - TTI.getCastInstrCost(Instruction::Trunc, ReductionSrcTy, TruncSrcTy, - TTI::CastContextHint::None, CostKind, Trunc) + - TTI.getArithmeticReductionCost(ReductionOpc, ReductionSrcTy, std::nullopt, - CostKind); + InstructionCost OldCost = TTI.getArithmeticReductionCost( + ReductionOpc, ReductionSrcTy, std::nullopt, CostKind); + if (auto *Trunc = dyn_cast(ReductionSrc)) + OldCost += + TTI.getCastInstrCost(Instruction::Trunc, ReductionSrcTy, TruncSrcTy, + TTI::CastContextHint::None, CostKind, Trunc); InstructionCost NewCost = TTI.getArithmeticReductionCost(ReductionOpc, TruncSrcTy, std::nullopt, CostKind) + diff --git a/llvm/test/Transforms/VectorCombine/pr88796.ll b/llvm/test/Transforms/VectorCombine/pr88796.ll index d5cd52e11d39d..4f26f5dcbb928 100644 --- a/llvm/test/Transforms/VectorCombine/pr88796.ll +++ b/llvm/test/Transforms/VectorCombine/pr88796.ll @@ -1,7 +1,12 @@ -; REQUIRES: asserts -; RUN: not --crash opt -passes=vector-combine -disable-output %s +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4 +; RUN: opt -passes=vector-combine -S %s | FileCheck %s define i32 @test() { +; CHECK-LABEL: define i32 @test() { +; CHECK-NEXT: entry: +; CHECK-NEXT: [[TMP0:%.*]] = tail call i16 @llvm.vector.reduce.and.nxv8i16( trunc ( shufflevector ( insertelement ( poison, i32 268435456, i64 0), poison, zeroinitializer) to )) +; CHECK-NEXT: ret i32 0 +; entry: %0 = tail call i16 @llvm.vector.reduce.and.nxv8i16( trunc ( shufflevector ( insertelement ( poison, i32 268435456, i64 0), poison, zeroinitializer) to )) ret i32 0