From 59069986e7446123556630a32adce7f101eeaf8d Mon Sep 17 00:00:00 2001
From: Jubilee Young <workingjubilee@gmail.com>
Date: Sat, 7 Jun 2025 11:04:40 -0700
Subject: [PATCH 1/2] tests: Copy dont-shuffle-bswaps per tested opt level

---
 .../autovec/dont-shuffle-bswaps-opt2.rs       | 29 +++++++++++++++++++
 .../dont-shuffle-bswaps-opt3.rs}              |  3 +-
 2 files changed, 30 insertions(+), 2 deletions(-)
 create mode 100644 tests/codegen/autovec/dont-shuffle-bswaps-opt2.rs
 rename tests/codegen/{dont-shuffle-bswaps.rs => autovec/dont-shuffle-bswaps-opt3.rs} (94%)

diff --git a/tests/codegen/autovec/dont-shuffle-bswaps-opt2.rs b/tests/codegen/autovec/dont-shuffle-bswaps-opt2.rs
new file mode 100644
index 0000000000000..391cf1c639ca3
--- /dev/null
+++ b/tests/codegen/autovec/dont-shuffle-bswaps-opt2.rs
@@ -0,0 +1,29 @@
+//@ compile-flags: -Copt-level=2
+
+#![crate_type = "lib"]
+#![no_std]
+
+// The code is from https://github.com/rust-lang/rust/issues/122805.
+// Ensure we do not generate the shufflevector instruction
+// to avoid complicating the code.
+
+// CHECK-LABEL: define{{.*}}void @convert(
+// CHECK-NOT: shufflevector
+#[no_mangle]
+pub fn convert(value: [u16; 8]) -> [u8; 16] {
+    #[cfg(target_endian = "little")]
+    let bswap = u16::to_be;
+    #[cfg(target_endian = "big")]
+    let bswap = u16::to_le;
+    let addr16 = [
+        bswap(value[0]),
+        bswap(value[1]),
+        bswap(value[2]),
+        bswap(value[3]),
+        bswap(value[4]),
+        bswap(value[5]),
+        bswap(value[6]),
+        bswap(value[7]),
+    ];
+    unsafe { core::mem::transmute::<_, [u8; 16]>(addr16) }
+}
diff --git a/tests/codegen/dont-shuffle-bswaps.rs b/tests/codegen/autovec/dont-shuffle-bswaps-opt3.rs
similarity index 94%
rename from tests/codegen/dont-shuffle-bswaps.rs
rename to tests/codegen/autovec/dont-shuffle-bswaps-opt3.rs
index c1dab2bc29536..e105487cccab2 100644
--- a/tests/codegen/dont-shuffle-bswaps.rs
+++ b/tests/codegen/autovec/dont-shuffle-bswaps-opt3.rs
@@ -1,5 +1,4 @@
-//@ revisions: OPT2 OPT3 OPT3_S390X
-//@[OPT2] compile-flags: -Copt-level=2
+//@ revisions: OPT3 OPT3_S390X
 //@[OPT3] compile-flags: -C opt-level=3
 // some targets don't do the opt we are looking for
 //@[OPT3] only-64bit

From 6b0deb2161b730be16c1ec13c1ab47455c054f37 Mon Sep 17 00:00:00 2001
From: Jubilee Young <workingjubilee@gmail.com>
Date: Sat, 7 Jun 2025 11:12:38 -0700
Subject: [PATCH 2/2] tests: Revise dont-shuffle-bswaps-opt3 per tested arch

Some architectures gain target-cpu minimums in doing so.
---
 .../autovec/dont-shuffle-bswaps-opt2.rs       |  2 ++
 .../autovec/dont-shuffle-bswaps-opt3.rs       | 29 +++++++++----------
 2 files changed, 16 insertions(+), 15 deletions(-)

diff --git a/tests/codegen/autovec/dont-shuffle-bswaps-opt2.rs b/tests/codegen/autovec/dont-shuffle-bswaps-opt2.rs
index 391cf1c639ca3..c354228acc50a 100644
--- a/tests/codegen/autovec/dont-shuffle-bswaps-opt2.rs
+++ b/tests/codegen/autovec/dont-shuffle-bswaps-opt2.rs
@@ -3,6 +3,8 @@
 #![crate_type = "lib"]
 #![no_std]
 
+// This test is paired with the arch-specific -opt3.rs test.
+
 // The code is from https://github.com/rust-lang/rust/issues/122805.
 // Ensure we do not generate the shufflevector instruction
 // to avoid complicating the code.
diff --git a/tests/codegen/autovec/dont-shuffle-bswaps-opt3.rs b/tests/codegen/autovec/dont-shuffle-bswaps-opt3.rs
index e105487cccab2..203d12005de2a 100644
--- a/tests/codegen/autovec/dont-shuffle-bswaps-opt3.rs
+++ b/tests/codegen/autovec/dont-shuffle-bswaps-opt3.rs
@@ -1,28 +1,27 @@
-//@ revisions: OPT3 OPT3_S390X
-//@[OPT3] compile-flags: -C opt-level=3
-// some targets don't do the opt we are looking for
-//@[OPT3] only-64bit
-//@[OPT3] ignore-s390x
-//@[OPT3_S390X] compile-flags: -C opt-level=3 -C target-cpu=z13
-//@[OPT3_S390X] only-s390x
+//@ revisions: AARCH64 X86_64 Z13
+//@ compile-flags: -Copt-level=3
+//@[AARCH64] only-aarch64
+//@[X86_64] only-x86_64
+//@[Z13] only-s390x
+//@[Z13] compile-flags: -Ctarget-cpu=z13
 
 #![crate_type = "lib"]
 #![no_std]
 
+// This test is paired with the arch-neutral -opt2.rs test
+
 // The code is from https://github.com/rust-lang/rust/issues/122805.
 // Ensure we do not generate the shufflevector instruction
 // to avoid complicating the code.
+
 // CHECK-LABEL: define{{.*}}void @convert(
 // CHECK-NOT: shufflevector
+
 // On higher opt levels, this should just be a bswap:
-// OPT3: load <8 x i16>
-// OPT3-NEXT: call <8 x i16> @llvm.bswap
-// OPT3-NEXT: store <8 x i16>
-// OPT3-NEXT: ret void
-// OPT3_S390X: load <8 x i16>
-// OPT3_S390X-NEXT: call <8 x i16> @llvm.bswap
-// OPT3_S390X-NEXT: store <8 x i16>
-// OPT3_S390X-NEXT: ret void
+// CHECK: load <8 x i16>
+// CHECK-NEXT: call <8 x i16> @llvm.bswap
+// CHECK-NEXT: store <8 x i16>
+// CHECK-NEXT: ret void
 #[no_mangle]
 pub fn convert(value: [u16; 8]) -> [u8; 16] {
     #[cfg(target_endian = "little")]