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TheZoq2TheZoq2
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Remove generic RCC buses from public API (#232)
* Remove generic RCC buses from public API
1 parent cc66906 commit 28d943d

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4 files changed

+31
-31
lines changed

4 files changed

+31
-31
lines changed

‎src/i2c.rs

Lines changed: 5 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -9,7 +9,7 @@ use crate::gpio::gpiob::{PB10, PB11, PB6, PB7, PB8, PB9};
99
use crate::gpio::{Alternate, OpenDrain};
1010
use crate::hal::blocking::i2c::{Read, Write, WriteRead};
1111
use crate::pac::{DWT, I2C1, I2C2};
12-
use crate::rcc::{sealed::RccBus, Clocks, Enable, GetBusFreq, Reset};
12+
use crate::rcc::{sealed::RccBus, Clocks, Enable, GetBusFreq, Reset, APB1};
1313
use crate::time::Hertz;
1414
use nb::Error::{Other, WouldBlock};
1515
use nb::{Error as NbError, Result as NbResult};
@@ -113,7 +113,7 @@ impl<PINS> I2c<I2C1, PINS> {
113113
mapr: &mut MAPR,
114114
mode: Mode,
115115
clocks: Clocks,
116-
apb: &mut <I2C1 as RccBus>::Bus,
116+
apb: &mut APB1,
117117
) -> Self
118118
where
119119
PINS: Pins<I2C1>,
@@ -131,7 +131,7 @@ impl<PINS> BlockingI2c<I2C1, PINS> {
131131
mapr: &mut MAPR,
132132
mode: Mode,
133133
clocks: Clocks,
134-
apb: &mut <I2C1 as RccBus>::Bus,
134+
apb: &mut APB1,
135135
start_timeout_us: u32,
136136
start_retries: u8,
137137
addr_timeout_us: u32,
@@ -157,13 +157,7 @@ impl<PINS> BlockingI2c<I2C1, PINS> {
157157

158158
impl<PINS> I2c<I2C2, PINS> {
159159
/// Creates a generic I2C2 object on pins PB10 and PB11 using the embedded-hal `BlockingI2c` trait.
160-
pub fn i2c2(
161-
i2c: I2C2,
162-
pins: PINS,
163-
mode: Mode,
164-
clocks: Clocks,
165-
apb: &mut <I2C2 as RccBus>::Bus,
166-
) -> Self
160+
pub fn i2c2(i2c: I2C2, pins: PINS, mode: Mode, clocks: Clocks, apb: &mut APB1) -> Self
167161
where
168162
PINS: Pins<I2C2>,
169163
{
@@ -178,7 +172,7 @@ impl<PINS> BlockingI2c<I2C2, PINS> {
178172
pins: PINS,
179173
mode: Mode,
180174
clocks: Clocks,
181-
apb: &mut <I2C2 as RccBus>::Bus,
175+
apb: &mut APB1,
182176
start_timeout_us: u32,
183177
start_retries: u8,
184178
addr_timeout_us: u32,

‎src/serial.rs

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -53,7 +53,7 @@ use crate::gpio::gpiob::{PB10, PB11, PB6, PB7};
5353
use crate::gpio::gpioc::{PC10, PC11};
5454
use crate::gpio::gpiod::{PD5, PD6, PD8, PD9};
5555
use crate::gpio::{Alternate, Floating, Input, PushPull};
56-
use crate::rcc::{sealed::RccBus, Clocks, Enable, GetBusFreq, Reset};
56+
use crate::rcc::{sealed::RccBus, Clocks, Enable, GetBusFreq, Reset, APB1, APB2};
5757
use crate::time::{Bps, U32Ext};
5858

5959
/// Interrupt event
@@ -263,6 +263,7 @@ macro_rules! hal {
263263
$usartX_remap:ident,
264264
$bit:ident,
265265
$closure:expr,
266+
$APBx:ident,
266267
),
267268
)+) => {
268269
$(
@@ -292,7 +293,7 @@ macro_rules! hal {
292293
mapr: &mut MAPR,
293294
config: Config,
294295
clocks: Clocks,
295-
apb: &mut <$USARTX as RccBus>::Bus,
296+
apb: &mut $APBx,
296297
) -> Self
297298
where
298299
PINS: Pins<$USARTX>,
@@ -473,20 +474,23 @@ hal! {
473474
usart1_remap,
474475
bit,
475476
|remap| remap == 1,
477+
APB2,
476478
),
477479
/// # USART2 functions
478480
USART2: (
479481
usart2,
480482
usart2_remap,
481483
bit,
482484
|remap| remap == 1,
485+
APB1,
483486
),
484487
/// # USART3 functions
485488
USART3: (
486489
usart3,
487490
usart3_remap,
488491
bits,
489492
|remap| remap,
493+
APB1,
490494
),
491495
}
492496

‎src/spi.rs

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -46,7 +46,7 @@ use crate::gpio::gpiob::{PB13, PB14, PB15, PB3, PB4, PB5};
4646
#[cfg(feature = "connectivity")]
4747
use crate::gpio::gpioc::{PC10, PC11, PC12};
4848
use crate::gpio::{Alternate, Floating, Input, PushPull};
49-
use crate::rcc::{sealed::RccBus, Clocks, Enable, GetBusFreq, Reset};
49+
use crate::rcc::{Clocks, Enable, GetBusFreq, Reset, APB1, APB2};
5050
use crate::time::Hertz;
5151

5252
use core::sync::atomic::{self, Ordering};
@@ -154,7 +154,7 @@ impl<REMAP, PINS> Spi<SPI1, REMAP, PINS> {
154154
mode: Mode,
155155
freq: F,
156156
clocks: Clocks,
157-
apb: &mut <SPI1 as RccBus>::Bus,
157+
apb: &mut APB2,
158158
) -> Self
159159
where
160160
F: Into<Hertz>,
@@ -173,7 +173,7 @@ impl<REMAP, PINS> Spi<SPI2, REMAP, PINS> {
173173
mode: Mode,
174174
freq: F,
175175
clocks: Clocks,
176-
apb: &mut <SPI2 as RccBus>::Bus,
176+
apb: &mut APB1,
177177
) -> Self
178178
where
179179
F: Into<Hertz>,
@@ -192,7 +192,7 @@ impl<REMAP, PINS> Spi<SPI3, REMAP, PINS> {
192192
mode: Mode,
193193
freq: F,
194194
clocks: Clocks,
195-
apb: &mut <SPI3 as RccBus>::Bus,
195+
apb: &mut APB1,
196196
) -> Self
197197
where
198198
F: Into<Hertz>,

‎src/timer.rs

Lines changed: 16 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -67,7 +67,9 @@ use crate::pac::{DBGMCU as DBG, TIM2, TIM3};
6767
#[cfg(feature = "stm32f100")]
6868
use crate::pac::{TIM15, TIM16, TIM17};
6969

70-
use crate::rcc::{sealed::RccBus, Clocks, Enable, GetBusFreq, Reset};
70+
#[cfg(not(feature = "stm32f101"))]
71+
use crate::rcc::APB2;
72+
use crate::rcc::{sealed::RccBus, Clocks, Enable, GetBusFreq, Reset, APB1};
7173
use cast::{u16, u32, u64};
7274
use cortex_m::peripheral::syst::SystClkSource;
7375
use cortex_m::peripheral::SYST;
@@ -256,11 +258,11 @@ impl CountDown for CountDownTimer<SYST> {
256258
impl Periodic for CountDownTimer<SYST> {}
257259

258260
macro_rules! hal {
259-
($($TIMX:ident: ($timX:ident, $dbg_timX_stop:ident$(,$master_timbase:ident)*),)+) => {
261+
($($TIMX:ident: ($timX:ident, $APBx:ident, $dbg_timX_stop:ident$(,$master_timbase:ident)*),)+) => {
260262
$(
261263
impl Timer<$TIMX> {
262264
/// Initialize timer
263-
pub fn $timX(tim: $TIMX, clocks: &Clocks, apb: &mut <$TIMX as RccBus>::Bus) -> Self {
265+
pub fn $timX(tim: $TIMX, clocks: &Clocks, apb: &mut $APBx) -> Self {
264266
// enable and reset peripheral to a clean slate state
265267
$TIMX::enable(apb);
266268
$TIMX::reset(apb);
@@ -419,48 +421,48 @@ fn compute_arr_presc(freq: u32, clock: u32) -> (u16, u16) {
419421
}
420422

421423
hal! {
422-
TIM2: (tim2, dbg_tim2_stop, tim2),
423-
TIM3: (tim3, dbg_tim3_stop, tim2),
424+
TIM2: (tim2, APB1, dbg_tim2_stop, tim2),
425+
TIM3: (tim3, APB1, dbg_tim3_stop, tim2),
424426
}
425427

426428
#[cfg(any(feature = "stm32f100", feature = "stm32f103", feature = "connectivity",))]
427429
hal! {
428-
TIM1: (tim1, dbg_tim1_stop, tim1),
430+
TIM1: (tim1, APB2, dbg_tim1_stop, tim1),
429431
}
430432

431433
#[cfg(any(feature = "stm32f100", feature = "high", feature = "connectivity",))]
432434
hal! {
433-
TIM6: (tim6, dbg_tim6_stop, tim6),
435+
TIM6: (tim6, APB1, dbg_tim6_stop, tim6),
434436
}
435437

436438
#[cfg(any(
437439
all(feature = "high", any(feature = "stm32f101", feature = "stm32f103",),),
438440
any(feature = "stm32f100", feature = "connectivity",)
439441
))]
440442
hal! {
441-
TIM7: (tim7, dbg_tim7_stop, tim6),
443+
TIM7: (tim7, APB1, dbg_tim7_stop, tim6),
442444
}
443445

444446
#[cfg(feature = "stm32f100")]
445447
hal! {
446-
TIM15: (tim15, dbg_tim15_stop),
447-
TIM16: (tim16, dbg_tim16_stop),
448-
TIM17: (tim17, dbg_tim17_stop),
448+
TIM15: (tim15, APB2, dbg_tim15_stop),
449+
TIM16: (tim16, APB2, dbg_tim16_stop),
450+
TIM17: (tim17, APB2, dbg_tim17_stop),
449451
}
450452

451453
#[cfg(feature = "medium")]
452454
hal! {
453-
TIM4: (tim4, dbg_tim4_stop, tim2),
455+
TIM4: (tim4, APB1, dbg_tim4_stop, tim2),
454456
}
455457

456458
#[cfg(any(feature = "high", feature = "connectivity"))]
457459
hal! {
458-
TIM5: (tim5, dbg_tim5_stop, tim2),
460+
TIM5: (tim5, APB1, dbg_tim5_stop, tim2),
459461
}
460462

461463
#[cfg(all(feature = "stm32f103", feature = "high",))]
462464
hal! {
463-
TIM8: (tim8, dbg_tim8_stop, tim1),
465+
TIM8: (tim8, APB2, dbg_tim8_stop, tim1),
464466
}
465467

466468
//TODO: restore these timers once stm32-rs has been updated

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