New timer methods

Author: thalesfragoso

CHANGELOG.md

@@ -15,18 +15,20 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 - Update existing ADC example according to ADC API changes
 - Add new ADC example to read ambient temperature using ADC1 CH16
 - Add `listen` and `unlisten` to `serial::Tx` and `serial::Rx`.
+- Add `count` and `reset` methods to timer
 
 
 ### Breaking changes
 
 - Replace gpio traits with digital::v2
 - Bump `stm32f1` dependency (`0.8.0`)
-- ADC now requires the clock configuration for intialisation
+- ADC now requires the clock configuration for initialisation
 - `disable_jtag` now transforms PA15, PB3 and PB4 to forbid their use without desactivating JTAG
 
 ### Changed
 
 - Fix hclk miscalculation
+- Starting the timer does not generate interrupt requests anymore
 
 ## [v0.3.0] - 2019-04-27
 

src/timer.rs

@@ -160,6 +160,21 @@ macro_rules! hal {
                     self.stop();
                     self.tim
                 }
+
+                /// Returns the current counter value
+                pub fn count(&self) -> u16 {
+                    self.tim.cnt.read().cnt().bits()
+                }
+
+                /// Resets the counter and generates an update event
+                pub fn reset(&mut self) {
+                    // Sets the URS bit to prevent an interrupt from being triggered by
+                    // the UG bit.
+                    self.tim.cr1.modify(|_, w| w.urs().set_bit());
+
+                    self.tim.egr.write(|w| w.ug().set_bit());
+                    self.tim.cr1.modify(|_, w| w.urs().clear_bit());
+                }
             }
 
             impl CountDown for Timer<$TIMX> {
@@ -184,11 +199,7 @@ macro_rules! hal {
                     self.tim.arr.write(|w| w.arr().bits(arr) );
 
                     // Trigger an update event to load the prescaler value to the clock
-                    self.tim.egr.write(|w| w.ug().set_bit());
-                    // The above line raises an update event which will indicate
-                    // that the timer is already finished. Since this is not the case,
-                    // it should be cleared
-                    self.clear_update_interrupt_flag();
+                    self.reset();
 
                     // start counter
                     self.tim.cr1.modify(|_, w| w.cen().set_bit());