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git apple-llvm automerger
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Merge commit 'f5869ad302ad' from apple/master into swift/master-next
2 parents 4d5784b + f5869ad commit bba7cd5

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3 files changed

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-3
lines changed

3 files changed

+848
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clang/lib/Basic/Targets/Hexagon.cpp

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -100,7 +100,10 @@ const char *const HexagonTargetInfo::GCCRegNames[] = {
100100
"r9", "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17",
101101
"r18", "r19", "r20", "r21", "r22", "r23", "r24", "r25", "r26",
102102
"r27", "r28", "r29", "r30", "r31", "p0", "p1", "p2", "p3",
103-
"sa0", "lc0", "sa1", "lc1", "m0", "m1", "usr", "ugp"
103+
"sa0", "lc0", "sa1", "lc1", "m0", "m1", "usr", "ugp",
104+
"r1:0", "r3:2", "r5:4", "r7:6", "r9:8", "r11:10", "r13:12", "r15:14",
105+
"r17:16", "r19:18", "r21:20", "r23:22", "r25:24", "r27:26", "r29:28",
106+
"r31:30"
104107
};
105108

106109
ArrayRef<const char *> HexagonTargetInfo::getGCCRegNames() const {

llvm/lib/Target/Hexagon/HexagonISelLowering.cpp

Lines changed: 64 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -240,11 +240,73 @@ bool HexagonTargetLowering::mayBeEmittedAsTailCall(const CallInst *CI) const {
240240
return true;
241241
}
242242

243-
Register HexagonTargetLowering::getRegisterByName(const char* RegName, EVT VT,
244-
const MachineFunction &) const {
243+
Register HexagonTargetLowering::getRegisterByName(
244+
const char* RegName, EVT VT, const MachineFunction &) const {
245245
// Just support r19, the linux kernel uses it.
246246
Register Reg = StringSwitch<Register>(RegName)
247+
.Case("r0", Hexagon::R0)
248+
.Case("r1", Hexagon::R1)
249+
.Case("r2", Hexagon::R2)
250+
.Case("r3", Hexagon::R3)
251+
.Case("r4", Hexagon::R4)
252+
.Case("r5", Hexagon::R5)
253+
.Case("r6", Hexagon::R6)
254+
.Case("r7", Hexagon::R7)
255+
.Case("r8", Hexagon::R8)
256+
.Case("r9", Hexagon::R9)
257+
.Case("r10", Hexagon::R10)
258+
.Case("r11", Hexagon::R11)
259+
.Case("r12", Hexagon::R12)
260+
.Case("r13", Hexagon::R13)
261+
.Case("r14", Hexagon::R14)
262+
.Case("r15", Hexagon::R15)
263+
.Case("r16", Hexagon::R16)
264+
.Case("r17", Hexagon::R17)
265+
.Case("r18", Hexagon::R18)
247266
.Case("r19", Hexagon::R19)
267+
.Case("r20", Hexagon::R20)
268+
.Case("r21", Hexagon::R21)
269+
.Case("r22", Hexagon::R22)
270+
.Case("r23", Hexagon::R23)
271+
.Case("r24", Hexagon::R24)
272+
.Case("r25", Hexagon::R25)
273+
.Case("r26", Hexagon::R26)
274+
.Case("r27", Hexagon::R27)
275+
.Case("r28", Hexagon::R28)
276+
.Case("r29", Hexagon::R29)
277+
.Case("r30", Hexagon::R30)
278+
.Case("r31", Hexagon::R31)
279+
.Case("r1:0", Hexagon::D0)
280+
.Case("r3:2", Hexagon::D1)
281+
.Case("r5:4", Hexagon::D2)
282+
.Case("r7:6", Hexagon::D3)
283+
.Case("r9:8", Hexagon::D4)
284+
.Case("r11:10", Hexagon::D5)
285+
.Case("r13:12", Hexagon::D6)
286+
.Case("r15:14", Hexagon::D7)
287+
.Case("r17:16", Hexagon::D8)
288+
.Case("r19:18", Hexagon::D9)
289+
.Case("r21:20", Hexagon::D10)
290+
.Case("r23:22", Hexagon::D11)
291+
.Case("r25:24", Hexagon::D12)
292+
.Case("r27:26", Hexagon::D13)
293+
.Case("r29:28", Hexagon::D14)
294+
.Case("r31:30", Hexagon::D15)
295+
.Case("sp", Hexagon::R29)
296+
.Case("fp", Hexagon::R30)
297+
.Case("lr", Hexagon::R31)
298+
.Case("p0", Hexagon::P0)
299+
.Case("p1", Hexagon::P1)
300+
.Case("p2", Hexagon::P2)
301+
.Case("p3", Hexagon::P3)
302+
.Case("sa0", Hexagon::SA0)
303+
.Case("lc0", Hexagon::LC0)
304+
.Case("sa1", Hexagon::SA1)
305+
.Case("lc1", Hexagon::LC1)
306+
.Case("m0", Hexagon::M0)
307+
.Case("m1", Hexagon::M1)
308+
.Case("usr", Hexagon::USR)
309+
.Case("ugp", Hexagon::UGP)
248310
.Default(Register());
249311
if (Reg)
250312
return Reg;

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