[CheckPhysNetlist] Verify placement & static/clock routing unchanged #64
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Signed-off-by: Eddie Hung <eddie.hung@amd.com>
Signed-off-by: Eddie Hung <eddie.hung@amd.com>
Signed-off-by: Eddie Hung <eddie.hung@amd.com>
Signed-off-by: Eddie Hung <eddie.hung@amd.com>
Signed-off-by: Eddie Hung <eddie.hung@amd.com>
Signed-off-by: Eddie Hung <eddie.hung@amd.com>
Signed-off-by: Eddie Hung <eddie.hung@amd.com>
Signed-off-by: Eddie Hung <eddie.hung@amd.com>
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As part of the contest rules, routers are only allowed to modify the inter-site routing (PIPs) of the input Physical Netlist. Verify this is the case by leveraging RapidWright's
DesignComparatorfeature: Xilinx/RapidWright#931.