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[mlir][Vector] Fix scalable InsertSlice/ExtractSlice lowering #124861

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Merged
merged 2 commits into from
Jan 31, 2025
Merged

[mlir][Vector] Fix scalable InsertSlice/ExtractSlice lowering #124861

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298fff7
[mlir][Vector] Fix scalable Insert/ExtractSlice lowering
dcaballe Jan 28, 2025
2dfe220
Add TODO.
dcaballe Jan 31, 2025
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23 changes: 22 additions & 1 deletion mlir/lib/Dialect/Vector/Transforms/VectorInsertExtractStridedSliceRewritePatterns.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -96,11 +96,15 @@ class ConvertSameRankInsertStridedSliceIntoShuffle
PatternRewriter &rewriter) const override {
auto srcType = op.getSourceVectorType();
auto dstType = op.getDestVectorType();
int64_t srcRank = srcType.getRank();

// Scalable vectors are not supported by vector shuffle.
if ((srcType.isScalable() || dstType.isScalable()) && srcRank == 1)
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Why are we also checking for rank-1? Seems unrelated to this PR.

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srcRank == 1 you mean? That check is needed because that's the rank that leads to generating a vector shuffle. Otherwise the op is decomposed into lower order ops.

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(Sorry, I replied from my phone. See line 127 for the vector shuffle path).

return failure();

if (op.getOffsets().getValue().empty())
return failure();

int64_t srcRank = srcType.getRank();
int64_t dstRank = dstType.getRank();
assert(dstRank >= srcRank);
if (dstRank != srcRank)
Expand Down Expand Up @@ -184,6 +188,11 @@ class Convert1DExtractStridedSliceIntoShuffle
LogicalResult matchAndRewrite(ExtractStridedSliceOp op,
PatternRewriter &rewriter) const override {
auto dstType = op.getType();
auto srcType = op.getSourceVectorType();

// Scalable vectors are not supported by vector shuffle.
if (dstType.isScalable() || srcType.isScalable())
return failure();

assert(!op.getOffsets().getValue().empty() && "Unexpected empty offsets");

Expand Down Expand Up @@ -309,6 +318,8 @@ class DecomposeNDExtractStridedSlice
}
};

// TODO: Make sure these `populate*` patterns are tested in isolation.

void vector::populateVectorInsertExtractStridedSliceDecompositionPatterns(
RewritePatternSet &patterns, PatternBenefit benefit) {
patterns.add<DecomposeDifferentRankInsertStridedSlice,
Expand All @@ -331,4 +342,14 @@ void vector::populateVectorInsertExtractStridedSliceTransforms(
patterns.add<ConvertSameRankInsertStridedSliceIntoShuffle,
Convert1DExtractStridedSliceIntoShuffle>(patterns.getContext(),
benefit);
// Generate chains of extract/insert ops for scalable vectors only as they
// can't be lowered to vector shuffles.
populateVectorExtractStridedSliceToExtractInsertChainPatterns(
patterns,
/*controlFn=*/
[](ExtractStridedSliceOp op) {
return op.getType().isScalable() ||
op.getSourceVectorType().isScalable();
},
benefit);
}
15 changes: 8 additions & 7 deletions mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
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Expand Up @@ -2026,13 +2026,14 @@ func.func @extract_strided_slice_f32_1d_from_2d_scalable(%arg0: vector<4x[8]xf32
// CHECK-LABEL: func.func @extract_strided_slice_f32_1d_from_2d_scalable(
// CHECK-SAME: %[[ARG:.*]]: vector<4x[8]xf32>)
// CHECK: %[[A:.*]] = builtin.unrealized_conversion_cast %[[ARG]] : vector<4x[8]xf32> to !llvm.array<4 x vector<[8]xf32>>
// CHECK: %[[T0:.*]] = llvm.mlir.undef : !llvm.array<2 x vector<[8]xf32>>
// CHECK: %[[T1:.*]] = llvm.extractvalue %[[A]][2] : !llvm.array<4 x vector<[8]xf32>>
// CHECK: %[[T2:.*]] = llvm.insertvalue %[[T1]], %[[T0]][0] : !llvm.array<2 x vector<[8]xf32>>
// CHECK: %[[T3:.*]] = llvm.extractvalue %[[A]][3] : !llvm.array<4 x vector<[8]xf32>>
// CHECK: %[[T4:.*]] = llvm.insertvalue %[[T3]], %[[T2]][1] : !llvm.array<2 x vector<[8]xf32>>
// CHECK: %[[T5:.*]] = builtin.unrealized_conversion_cast %[[T4]] : !llvm.array<2 x vector<[8]xf32>> to vector<2x[8]xf32>
// CHECK: return %[[T5]]
// CHECK: %[[CST:.*]] = arith.constant dense<0.000000e+00> : vector<2x[8]xf32>
// CHECK: %[[DST:.*]] = builtin.unrealized_conversion_cast %[[CST]] : vector<2x[8]xf32> to !llvm.array<2 x vector<[8]xf32>>
// CHECK: %[[E0:.*]] = llvm.extractvalue %[[A]][2] : !llvm.array<4 x vector<[8]xf32>>
// CHECK: %[[E1:.*]] = llvm.extractvalue %[[A]][3] : !llvm.array<4 x vector<[8]xf32>>
// CHECK: %[[I0:.*]] = llvm.insertvalue %[[E0]], %[[DST]][0] : !llvm.array<2 x vector<[8]xf32>>
// CHECK: %[[I1:.*]] = llvm.insertvalue %[[E1]], %[[I0]][1] : !llvm.array<2 x vector<[8]xf32>>
// CHECK: %[[RES:.*]] = builtin.unrealized_conversion_cast %[[I1]] : !llvm.array<2 x vector<[8]xf32>> to vector<2x[8]xf32>
// CHECK: return %[[RES]]

// -----

Expand Down